Week 2

This week, we studied the voltage transfer characteristics of CMOS and PMOS, which can be treated as the basic knowledge of the organic CMOS and PMOS research.

According to the supervisor's suggestion, we use MATLAB to simulate the voltage transfer characteristics of CMOS and pseudo-NMOS in different aspect ratio.


CMOS inverter
The voltage transfer curve of a CMOS can be divided into 5 regions.

Region 1 ( 0≤ Vin < VTN ):
Pull Down Network (PDN, n-channel) is cut off, hence the Vout is pulled to VDD, Vout = VDD

Region 2 ( VTN≤Vin<Vo一|VTP|):
PDN is in saturation, PUN(Pull up net work, PMOS) is in triode. At this time, the current in PDN is

The current in PUN should be

and these two currents should be euqal in a no-load CMOS inverter.

Thus, the Vout is

Region 4 (Vout + VTN ≤ Vin <VDD - |VTP|):

PDN is in triode, PUN is in saturation.

The current in PUN should be

The current in PDN should be

and these two currents should be equal in a no-load CMOS inverter.

Hence, the Vout is

Region 5 (Vin> VDD -|VTP|):

PUN is off, hence the Vout=0.

The basic code for the COMS VTC can be shown as

In addition, the curve can be shown as

Then, experiments should change the aspect ratio of the P-Channel (PMOS) and N-Channel (NMOS) to observe the change of the voltage transfer characteristics curve. Therefore, the MATLAB code can be changed in below:

Also, the curve can be found as

Pseudo-NMOS
In a pseudo-NMOS, the pull up network is replaced with a single unconditional load device--a single PMOS transistor whose gate is grounded, which means that t is always on. The pull down network is still a NMOS.

The currents in the pseudo-NMOS under different Voltage conditions:
NMOS current:

PMOS current:

Pseudo-NMOS's voltage curve can be divided into 4 regions:

Region 1 (vi < Vtn):

Vout= VDD

Region 2 (vO ≥ vi-Vtn vO ≥ |Vtp|)：

Region 3 (vO ≥ vi-Vtn vO < |Vtp|)：

This is a short segment that is not of great interest.
Region 4 (vO < vi-Vtn vO < |Vtp|):

and in this region, the voltage will eventually decrease to  VOL:

(r is aspect ratio βN/βP)

The MATLAB code can be shown as:

The curve can be found as:

The red curve is r=100, the blue one is r=8 and the black is r=4.
The curves share the similar shape which is also the shape of a normal CMOS inverter. However, the VOL increases when the ratio of βN/βP decreases and for a large βN/βP, the VOL approaches 0. Hence, it is clear that pseudo NMOS is a type of ratioed logic, where relative device sizes set VOL or VOH.